This paper presents the design of MIMO signal detector based on LTE-A downlink. The detector use multiple input multiple output (MIMO) modes like Spatial multiplexing (SM), Spatial Diversity (SD) and Space Division Multiple Access (SDMA). Area efficiency is achieved by Near Maximum detection algorithms. The goal of the project is to develop a parallel multistage VLSI architecture to achieve area efficiency and high detection throughput. The MIMO modes are implemented in the pre processing stage of MIMO detector architecture. The parallel multistage VLSI architecture is used to achieve high detection throughput where multiple nodes are processed simultaneously in each layer. The Euclidean distance Calculation and interference cancellation scheme reduces the critical path delay of the system. The detector design uses 2×2 antenna, 64 QAM modulations with three MIMO modes.
Multiple Input Multiple Output Signal detector (MIMO), spatial diversity (SD), space division multiple access (SDMA), Spatial Multiplexing(SM), Very Large Scale Integration (VLSI)
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A.Vimala, P.Karthigaikumar, Y.Camy Joshya. (2017) A Signal Identification Model for MIMO Design. International Journal of Control Systems and Robotics, 2, 221-226
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