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AUTHOR(S):

Yogita Gajare, Arti Khaparde

 

TITLE

Comparison of D Flip-Flops Using Variability and Delay Analysis for Sigma Delta ADC

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ABSTRACT

Circuit with better robustness and minimum transistors is always preferred in a market to design a smart chip. Speed and variability of D flip-flop are required in sigma delta ADC to count the number of pulses after comparator. The paper aims to design single phase clocked feedback D flip-flop to achieve variability and delay by using minimum transistors. Instead of pass gate, the proposed circuit consists of feedback path isolation with inversion to lessen a number of transistors. It is compared with different kinds of D flip-flops that are used in sequential circuits. In this work, it is found that speed is better than Push pull isolation D flip-flop and robustness is quite good by minimum transistor. Circuit layout is built in Electric VLSI Cad Tool. Supply voltage of 0.9 V and 180nm technology is used.

KEYWORDS

D Flip-Flop, Delay, Variability, Speed, Robustness, Transistor

REFERENCES

[1] Himanshu Kumar, Amresh Kumar, Aminul Islam, Comparative Analysis of D Flip-Flops in Terms of Delay and its Variability, 4th International Conference on Reliability, Infocom Technologies and Optimization (ICRITO) IEEE, 2015.

[2] M. Alioto, G. Palumbo, and M. Pennisi, Understanding the effect of process variations on the delay static and domino logic, IEEE Trans. Very Large Scale Integr. (VLSI) Syst., vol.18, no. 5, pp. 697–710, May 2010.

[3] R. Vaddi, S. Dasgupta, and R. P. Agarwal, Device and circuit co-design robustness studies in the sub threshold logic for ultralow-power applications for 32nm CMOS, IEEE transactions on Electronic Devices, vol. 57, no. 3, pp. 654-664,Feb. 2010.

[4] J. Mahattanakul, Design Procedure for Two-Stage CMOS Operational Amplifiers Employing Current Buffer, IEEE Transactions On Circuits And Systems—Ii: Express Briefs, Vol. 52, No. 11, November 2005.

[5] R.Jacob Baker, CMOS Circuit design, layout and simulation, third Edition, Wiley Publication, Chap.5, 2010.

Cite this paper

Yogita Gajare, Arti Khaparde. (2018) Comparison of D Flip-Flops Using Variability and Delay Analysis for Sigma Delta ADC. International Journal of Circuits and Electronics, 3, 7-13

 

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